Epitaxial layers may be used to enhance performance of transistors of a given polarity in an integrated circuit. For example, silicon-germanium epitaxial source/drain layers may be used to increase on-state currents in p-channel metal oxide semiconductor (PMOS) transistors. Similarly, silicon carbide epitaxial source/drain layers may be used to increase on-state currents in n-channel metal oxide semiconductor (NMOS) transistors. It may be desirable to achieve a differential enhancement between two types of transistors of the same polarity in an integrated circuit. For example, it may be desirable to achieve higher on-state current in transistors in logic gates compared to transistors in static random access memory (SRAM) circuits. Attaining desired levels of differential performance between types of transistors of the same polarity having epitaxial source/drain layers without increasing fabrication cost and/or complexity has been problematic.